As integrated circuits continue to scale downward in size, the finFET (fin field effect transistor) is becoming an attractive device for use with smaller nodes, e.g., the 22 nm node and beyond. In a finFET, the channel is formed by a semiconductor fin and a gate electrode is located on at least two sides of the fin. Due to the advantageous feature of full depletion in a finFET, the increased number of sides on which the gate electrode controls the channel of the finFET enhances the controllability of the channel in a finFET compared to a planar MOSFET. The improved control of the channel allows smaller device dimensions with less short channel effects as well as larger electrical current that can be switched at high speeds. A finFET device generally has faster switching times, equivalent or higher current density, and much improved short channel control than planar CMOS technology utilizing similar critical dimensions.
For finFET technology to be viable, it is necessary to be able to construct devices with different operating voltages and threshold voltages. For example, a circuit design might require I/O devices that operate at a first voltage and high-performance logic devices that operate at a second, different voltage be fabricated on the same chip. Additionally, chips may include devices having different threshold voltages (Vt) in order to meet various performance and/or power requirements of a design.
Moreover, on-chip capacitors are commonly used as decoupling capacitors to suppress power supply noise. Planar metal-insulator-metal (MIM) capacitors suffer from a low capacitance per area. Fin-based metal-oxide-semiconductor (fin MOS) capacitors exhibit relatively better capacitance per area than planar MIM capacitors; however, conventional fin MOS capacitors have poor performance due to the high resistance of the narrow semiconductor fins.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.